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? semiconductor components industries, llc, 2016 june, 2016 ? rev. 6 1 publication order number: ncv8154/d ncv8154 dual 300 ma, low i q , low dropout, dual input voltage regulator the ncv8154 is 300 ma, dual output linear voltage regulator that offers two independent input pins and provides a very stable and accurate voltage with ultra low noise and very high power supply rejection ratio (psrr) suitable for rf applications. the ncv8154 is suitable for powering rf blocks of automotive infotainment systems and other power sensitive device. due to low power consumption the ncv8154 offers high efficiency and low thermal dissipation. features ? operating input voltage range: 1.9 v to 5.25 v ? two independent input voltage pins ? two independent output voltage (for detail please refer to ordering information) ? low iq of typ. 55 a per channel ? high psrr: 75 db at 1 khz ? very low dropout: 140 mv typical at 300 ma ? thermal shutdown and current limit protections ? stable with a 1 f ceramic output capacitor ? available in dfn10 3x3mm and wdfn6 1.5x1.5mm packages ? active output discharge for fast output turn-off ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable; device temperature grade 1: ?40 c to +125 c ambient operating temperature range ? these are pb-free devices typical applications ? applications requiring wettable flanks for enhanced visual inspection ? wireless lan, bluetooth ? , zigbee ? interfaces ? automotive infotainment systems in1 in2 en1 en2 out1 out2 gnd ncv8154 v out1 v out2 c out1 1 f c out2 1 f c in2 1 f c in1 1 f v in1 v in2 figure 1. typical application schematic dfn10, 3x3 case 485c marking diagrams www. onsemi.com pin connections 2 5 n/c out1 3 out2 9 6 n/c in1 8 in2 ep 1 gnd 10 en1 see detailed ordering, marking and shipping information on page 16 of this data sheet. ordering information dfn10 (top view) x = ncv8154n ? non wettable flank = ncv8154w ? wettable flank vvvvv = voltage option a = assembly location l = wafer lot y = year w = work week x = specific device code m = month code = pb?free package ncv8154x vvvvv alyw (note: microdot may be in either location) 4 7 gnd en2 wdfn6, 1.5x1.5 case 511bj x m 1 2 in 3 en2 5 out2 4 gnd 1 en1 6 out1 wdfn6 (top view)
ncv8154 www. onsemi.com 2 figure 2. simplified schematic block diagram in2* out2 active discharge thermal shutdown enable logic gnd en2 en2 bandgap reference mosfet driver with current limit thermal shutdown mosfet driver with current limit active discharge en1 bandgap reference enable logic en1 out1 in1* gnd *dual in available only for dfn10 table 1. pin function description ? dfn10 pin no. pin name description 1 gnd power supply ground. soldered to the copper plane allows for effective heat dissipation. 2 out1 regulated output voltage of the first channel. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. 3 out2 regulated output voltage of the second channel. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. 4 gnd power supply ground. soldered to the copper plane allows for effective heat dissipation. 5,6 n/c not connected, can be tied to ground plane to improve thermal dissipation. 7 en2 driving en2 over 0.9 v turns-on out2. driving en below 0.4 v turns-off the out2 and activates the active discharge. 8 in2 inputs pin for second channel. it is recommended to connect 1 f ceramic capacitor close to the device pin. 9 in1 inputs pin for first channel. it is recommended to connect 1 f ceramic capacitor close to the device pin. 10 en1 driving en1 over 0.9 v turns-on out1. driving en below 0.4 v turns-off the out1 and activates the active discharge. ? exp exposed pad must be tied to ground. soldered to the copper plane allows for effective thermal dissipation.
ncv8154 www. onsemi.com 3 table 2. pin function description ? wdfn6 pin no. pin name description 1 en1 driving en1 over 0.9 v turns-on out1. driving en below 0.4 v turns-off the out1. 2 in inputs pin. it is recommended to connect at least 1 f ceramic capacitor close to the device pin. 3 en2 driving en2 over 0.9 v turns-on out2. driving en below 0.4 v turns-off the out2. 4 gnd power supply ground. soldered to the copper plane allows for effective heat dissipation. 5 out2 regulated output voltage of the second channel. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. 6 out1 regulated output voltage of the first channel. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. table 3. absolute maximum ratings rating symbol value unit input voltage (note 1) v in1 , v in2 ?0.3 v to 6 v v output voltage v out1 , v out2 ?0.3 v to v in + 0.3 v or 6 v v enable inputs v en1 , v en2 ?0.3 v to v in + 0.3 v or 6 v v output short circuit duration t sc indefinite s operating ambient temperature range t a ?40 to +125 c maximum junction temperature t j(max) 150 c storage temperature t stg ?55 to 150 c esd capability, human body model (note 2) esd hbm 2,000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec?q100?002 (eia/jesd22?a114) esd machine model tested per aec?q100?003 (eia/jesd22?a115) latchup current maximum rating tested per jedec standard: jesd78. table 4. thermal characteristics (note 3) rating symbol value unit thermal characteristics, dfn10 3 3 mm, thermal resistance, junction-to-air ja 109 c/w thermal characteristics, wdfn6 1.5 1.5 mm, thermal resistance, junction-to-air ja 207 c/w 3. single component mounted on 1 oz, fr4 pcb with 645 mm 2 cu area. recommended operating conditions parameter symbol min max unit input voltage v in 1.9 5.25 v junction temperature t j ?40 125 c functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability.
ncv8154 www. onsemi.com 4 table 5. electrical characteristics (?40 c t j 125 c; v in =v out(nom) + 1 v or 2.5 v, whichever is greater; v en = 0.9 v, i out = 1 ma, c in =c out =1 f. typical values are at t j = +25 c. min/max values are specified for t j = ?40 c and t j = 125 c respectively.) (note 4) parameter test conditions symbol min typ max unit operating input voltage v in 1.9 5.25 v output voltage accuracy ?40 c t j 125 c v out > 2 v v out ?3 +3 % v out 2 v ?60 +60 mv line regulation v out + 0.5 v v in 5 v reg line 0.02 0.2 %/v load regulation i out = 1 ma to 300 ma dfn10 reg load 15 40 mv wdfn6 25 45 dropout voltage (note 5) i out = 300 ma v out(nom) = 1.8 v v do 335 430 mv v out(nom) = 2.8 v 160 290 v out(nom) = 3.3 v 140 270 output current limit v out = 90% v out(nom) i cl 400 ma quiescent current i out = 0 ma, en1 = v in , en2 = 0 v or en2 = v in , en1 = 0 v i q 55 100 a i out1 = i out2 = 0 ma, v en1 = v en2 = v in i q 110 200 shutdown current (note 6) v en 0.4 v, v in = 5.25 v i dis 0.1 1 a en pin threshold voltage high threshold low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 0.9 0.4 v en pin input current v en = v in = 5.25 v i en 0.3 1.0 a power supply rejection ratio v in = v out + 1 v for v out > 2 v, v in = 2.5 v, for v out 2 v, i out = 10 ma f = 1 khz psrr 75 db output noise voltage f = 10 hz to 100 khz v n 75 v rms active discharge resistance v in = 4 v, v en < 0.4 v r dis 50 thermal shutdown temperature temperature increasing from t j = +25 c t sd 160 c thermal shutdown hysteresis temperature falling from t sd t sdh ? 20 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. performance guaranteed over the indicated operating temperature range by design and/ or characterization. production tested at t j =t a =25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 5. characterized when v out falls 100 mv below the regulated voltage at v in =v out(nom) +1v. 6. shutdown current is the current flowing into the in pin when the device is in the disable state.
ncv8154 www. onsemi.com 5 typical characteristics 1.85 v out , output voltage (v) t j , junction temperature ( c) ?40 i out = 1 ma i out = 300 ma v in = 2.8 v v out = 1.8 v c in = c out = 1 f figure 3. output voltage vs. temperature v out = 1.8 v 3.35 v out , output voltage (v) t j , junction temperature ( c) figure 4. output voltage vs. temperature v out = 3.3 v i out = 1 ma i out = 300 ma 1.84 1.83 1.82 1.81 1.80 1.79 1.78 1.77 1.76 1.75 ?20 0 20 40 60 80 100 120 140 ?40 ?20 0 20 40 60 80 100 120 140 v in = 4.3 v v out = 3.3 v c in = c out = 1 f 3.34 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 i gnd , ground current ( a) i out , output current (ma) 0 figure 5. ground current vs. output current 600 300 60 120 180 240 t j = 125 c t j = 25 c t j = ?40 c i q , quiescent current ( a) v in , input voltage (v) figure 6. quiescent current vs. input voltage 60 v in = 4.3 v v out = 3.3 v c in = c out = 1 f 540 480 420 360 300 240 180 120 60 0 v in = 4.3 v v out = 3.3 v c in = c out = 1 f 0 0.5 1 1.5 2 2.5 4 4.5 5 5.5 3 3.5 t j = 125 c t j = ?40 c t j = 25 c 54 48 52 36 30 24 18 12 6 0 i q , quiescent current ( a) t j , junction temperature ( c) figure 7. quiescent current vs. temperature 60 line reg , line regulation (%/v) t j , junction temperature ( c) figure 8. line regulation vs. temperature v out = 1.8 v 0.1 v in = 4.3 v v out = 3.3 v c in = c out = 1 f v in = 2.8 v v out = 1.8 v c in = c out = 1 f 58 56 54 52 50 48 46 44 42 40 ?40 ?20 0 20 40 60 80 100 120 140 ?40 ?20 0 20 40 60 80 100 120 14 0 0.08 0.06 0.04 0.02 0 ?0.02 ?0.04 ?0.06 0.08 ?0.1
ncv8154 www. onsemi.com 6 typical characteristics 0.1 line reg , line regulation (%/v) t j , junction temperature ( c) figure 9. line regulation vs. temperature v out = 3.3 v 30 reg load , load regulation (mv) t j , junction temperature ( c) figure 10. load regulation vs. temperature v out = 2.8 v reg load , load regulation (mv) t j , junction temperature ( c) figure 11. load regulation vs. temperature v out = 3.3 v 225 v drop , dropout voltage (mv) i out , output current (ma) 0 figure 12. dropout voltage vs. output current 30 60 v drop , dropout voltage (mv) t j , junction temperature ( c) figure 13. dropout voltage vs. temperature i out = 0 ma i out = 300 ma 0.08 0.06 0.04 0.02 0 ?0.02 ?0.04 ?0.06 ?0.08 ?0.1 270 30 0 t j = 125 c t j = ?40 c t j = 25 c i out = 150 ma 225 200 175 150 125 100 75 50 25 0 150 240 v in = 4.3 v v out = 3.3 v c in = c out = 1 f ?40 ?20 0 20 40 60 80 100 120 140 v in = 3.3 v v out = 2.8 v c in = c out = 1 f ?40 ?20 0 20 40 60 80 100 120 14 0 27 24 21 18 15 12 9 6 3 0 v in = 4.3 v v out = 3.3 v c in = c out = 1 f ?40 ?20 0 20 40 60 80 100 120 140 30 27 24 21 18 15 12 9 6 3 0 200 175 150 125 100 75 50 25 0 v in = 4.3 v v out = 3.3 v c in = c out = 1 f 180 210 80 120 ?40 ?20 0 20 40 60 80 100 120 140
ncv8154 www. onsemi.com 7 typical characteristics 600 i cl , current limit (ma) t j , junction temperature ( c) figure 14. current limit vs. temperature ?40 ?20 0 20 40 60 80 100 120 140 575 550 525 500 475 450 425 400 375 350 v in = 3.8 v v out = 90% v out(nom) c in = c out = 1 f v in = 5.25 v 600 i sc , short?circuit current (ma) t j , junction temperature ( c) figure 15. short?circuit current vs. temperature ?40 ?20 0 20 40 60 80 100 120 140 575 550 525 500 475 450 425 400 375 350 v in = 3.8 v v in = 5.25 v v out = 0 v c in = c out = 1 f 530 i sc , short?circuit current (ma) v in , input voltage (v) figure 16. short?circuit current vs. input voltage 2.5 2.8 3.1 3.7 4.0 4.3 4.6 4.9 5.2 5.5 520 510 500 490 480 470 460 450 440 430 3.4 v out = 0 v c in = c out = 1 f 100 i dis , disable current (na) t j , junction temperature ( c) figure 17. disable current vs. temperature ?40 ?20 0 20 40 60 80 100 120 140 v in = 4.3 v v out = 0 v v en = 0 v c in = c out = 1 f 90 80 70 60 50 40 30 20 10 0 1.0 v en , enable voltage (v) t j , junction temperature ( c) figure 18. enable thresholds vs. temperature ?40 ?20 0 20 40 60 80 100 120 140 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 v in = 4.3 v v out = 0 v c in = c out = 1 f off ?> on on ?> off 500 i en , enable current (na) t j , junction temperature ( c) figure 19. current to enable pin vs. temperature ?40 ?20 0 20 40 60 80 100 120 140 450 400 350 300 250 200 150 100 50 0 v in = 4.3 v v out = 3.3 v c in = c out = 1 f
ncv8154 www. onsemi.com 8 typical characteristics 100 r dis , discharge resistivity ( ) t j , junction temperature ( c) figure 20. discharge resistivity vs. temperature v in = 4.3 v v out = 1.8 v c in = c out = 1 f 90 80 70 60 50 40 30 20 10 0 ?40 ?20 0 20 40 60 80 100 120 140 100 r r , ripple rejection (db) frequency (khz) figure 21. power supply rejection ratio, v out = 1.8 v 90 80 70 60 50 40 30 20 10 0 0.1 1 10 100 1k 10k v in = 2.8 v + 100 mv pp v out = 1.8 v c in = none c out = 1 f, mlcc 100 r r , ripple rejection (db) frequency (khz) figure 22. power supply rejection ratio, v out = 3.3 v 90 80 70 60 50 40 30 20 10 0 0.1 1 10 100 1k 10k 1 ma 10 ma 100 ma 150 ma 300 ma v in = 4.3 v + 100 mv pp v out = 3.3 v c in = none c out = 1 f, mlcc 100 esr ( ) i out , output current (ma) figure 23. output capacitor esr vs. output current 0 60 120 180 240 300 v out = 1.8 v v out = 3.3 v 10 1 0.1 v in = v out = 1 v c in = c out = 1 f, mlcc, size 1206 1 ma 10 ma 100 ma 150 ma 300 ma figure 24. output voltage noise spectral density for v out = 2.8 v, c out = 1 f frequency (khz) output voltage noise ( v/rthz) 1000 10 1 0.1 0.01 100 1 ma 77.84 77.28 10 ma 71.71 70.48 150 ma 71.95 70.88 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out 10 1 0.1 0.01 0.001 v in = 2.8 v v out = 1.8 v c in = c out = 1 f 1 ma 10 ma 150 ma 300 ma 300 ma 72.71 71.67
ncv8154 www. onsemi.com 9 typical characteristics figure 25. output voltage noise spectral density for v out = 3.3 v, c out = 1 f frequency (khz) output voltage noise ( v/rthz) 1000 10 1 0.1 0.01 100 1 ma 119.7 117.87 10 ma 113.47 111.47 150 ma 113.84 112.05 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out 10 1 0.1 0.01 0.001 v in = 4.3 v v out = 3.3 v c in = c out = 1 f 1 ma 10 ma 150 ma 300 ma 300 ma 115.95 114.03 v in = 2.8 v v out = 1.8 v i out = 10 ma c out = c out = 1 f 500 mv/div i in 40 s/div v en 500 mv/div 40 s/div 100 ma/div v out i in v en v out v in = 2.8 v v out = 1.8 v i out = 10 ma c out = c out = 4.7 f figure 26. enable turn?on response ? v out = 1.8 v, c out = 1 f figure 27. enable turn?on response ? v out = 1.8 v, c out = 4.7 f 200 ma/div 500 mv/div 500 mv/div figure 28. enable turn?on response ? v out = 3.3 v, c out = 1 f 500 mv/div 50 ma/div 40 s/div 50 ma/div 500 mv/div 1 v/div figure 29. enable turn?on response ? v out = 3.3 v, c out = 4.7 f 40 s/div 100 ma/div i in v en v out v in = 3.8 v v out = 3.3 v i out = 10 ma c out = c out = 1 f 200 ma/div i in v en v out v in = 4.3 v v out = 3.3 v i out = 10 ma c out = c out = 4.7 f 1 v/div
ncv8154 www. onsemi.com 10 typical characteristics 500 mv/div 20 mv/div figure 30. line transient response ? rising edge, v out = 3.3 v, i out = 10 ma 8 s/div t rise = 1 s v in v out figure 31. line transient response ? falling edge, v out = 3.3 v, i out = 10 ma 8 s/div 500 mv/div t fall = 1 s v in v in = 3.8 v to 4.8 v i out = 10 ma c in = none c out = 1 f 20 mv/div v out v in = 4.8 v to 3.8 v i out = 10 ma c in = none c out = 1 f figure 32. line transient response ? rising edge, v out = 3.3 v, i out = 300 ma 500 mv/div 20 mv/div 4 s/div v in 500 mv/div 20 mv/div figure 33. line transient response ? falling edge, v out = 3.3 v, i out = 300 ma 4 s/div v in v out t rise = 1 s v out t fall = 1 s v in = 3.8 v to 4.8 v i out = 300 ma c in = none c out = 1 f v in = 4.8 v to 3.8 v i out = 300 ma c in = none c out = 1 f figure 34. line transient response ? rising edge, v out = 3.3 v, i out = 10 ma, c out = 4.7 f 500 mv/div 20 mv/div 4 s/div v in 500 mv/div 20 mv/div figure 35. line transient response ? falling edge, v out = 3.3 v, i out = 10 ma, c out = 4.7 f 4 s/div v in v out t rise = 1 s v out t fall = 1 s v in = 3.8 v to 4.8 v i out = 10 ma c in = none c out = 4.7 f v in = 4.8 v to 3.8 v i out = 10 ma c in = none c out = 4.7 f
ncv8154 www. onsemi.com 11 typical characteristics 100 ma/div 50 mv/div figure 36. load transient response ? 1.8 v ? rising edge, i out1 = 100 a to 300 ma 4 s/div t rise = 1 s i out1 v out2 figure 37. load transient response ? 1.8 v ? falling edge, i out1 = 300 ma to 100 a 100 s/div t fall = 1 s v out2 i out1 v out1 v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f 50 mv/div v out1 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f figure 38. load transient response ? 1.8 v ? rising edge, i out1 = 1 ma to 300 ma 4 s/div t rise = 500 ns v out1 figure 39. load transient response ? 1.8 v ? falling edge, i out1 = 300 ma to 1 ma 10 s/div t fall = 500 ns i out1 v out2 v out1 i out1 v out2 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f figure 40. load transient response ? 1.8 v ? rising edge, i out = 50 ma to 300 ma 4 s/div t rise = 500 ns figure 41. load transient response ? falling edge, i out = 300 ma to 50 ma 4 s/div t fall = 500 ns v out1 i out1 v out2 v out1 i out1 v out2 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f
ncv8154 www. onsemi.com 12 typical characteristics 100 ma/div 50 mv/div figure 42. load transient response ? 3.3 v ? rising edge, i out1 = 100 a to 300 ma 4 s/div t rise = 500 ns i out1 v out2 figure 43. load transient response ? 3.3 v ? falling edge, i out1 = 300 ma to 100 a 100 s/div t fall = 500 ns v out2 i out1 v out1 v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f 50 mv/div v out1 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f figure 44. load transient response ? 3.3 v ? rising edge, i out1 = 1 ma to 300 ma 4 s/div t rise = 500 ns v out1 figure 45. load transient response ? 3.3 v ? falling edge, i out1 = 300 ma to 1 ma 10 s/div t fall = 500 ns i out1 v out2 v out1 i out1 v out2 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f figure 46. load transient response ? 3.3 v ? rising edge, i out = 50 ma to 300 ma 4 s/div t rise = 500 ns figure 47. load transient response ? falling edge, i out = 300 ma to 50 ma 4 s/div t fall = 500 ns v out1 i out1 v out2 v out1 i out1 v out2 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f 100 ma/div 50 mv/div 50 mv/div v in = v out + 1 v v out1 = 3.3 v v out2 = 1.8 v i out2 = 10 ma c out1 = 1 f c out2 = 1 f
ncv8154 www. onsemi.com 13 typical characteristics 200 s/div v out v en figure 48. enable turn?off, v out = 1.8 v 500 mv/div 1 v/div c out = 1 f c out = 4.7 f v in = 2.8 v v out = 1.8 v i out = 0 ma c out = 1 f, 4.7 f 200 s/div v out v en figure 49. enable turn?off, v out = 3.3 v 500 mv/div 1 v/div c out = 1 f c out = 4.7 f v in = 4.3 v v out = 3.3 v i out = 0 ma c out = 1 f, 4.7 f v out1 v in v out2 1 v/div 50 ma/div 1 v/div v out i out v in = 5.25 v v out = 3.3 v c in = c out = 1 f figure 50. turn?on/off ? slow rising v in 20 ms/div figure 51. short?circuit and thermal shutdown 10 s/div v in = 4.3 v v out1 = 3.3 v i out1 = 10 ma i out2 = 10 ma c in = c out1 = c out2 = 1 f overheating short?circuit current thermal shutdown tsd cycling short?circuit event
ncv8154 www. onsemi.com 14 general the ncv8154 is a dual output high performance 300 ma low dropout linear regulator. this device delivers very high psrr (75 db at 1 khz) and excellent dynamic performance as load/line transients. in connection with low quiescent current this device is very suitable for various battery powered applications such as tablets, cellular phones, wireless and many others. each output is fully protected in case of output overload, output short circuit condition and overheating, assuring a very robust design. the ncv8154 device is housed in dfn10 3 x3 mm package which is useful for space constrains application. input capacitor selection (c in ) it is recommended to connect at least a 1 f ceramic x5r or x7r capacitor as close as possible to the in pin of the device. this capacitor will provide a low impedance path for unwanted ac signals or noise modulated onto constant input voltage. there is no requirement for the min. or max. esr of the input capacitor but it is recommended to use ceramic capacitors for their low esr and esl. a good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. larger input capacitor may be necessary if fast and large load transients are encountered in the application. output decoupling (c out ) the ncv8154 requires an output capacitor for each output connected as close as possible to the output pin of the regulator. the recommended capacitor value is 1 f and x7r or x5r dielectric due to its low capacitance variations over the specified temperature range. the ncv8154 is designed to remain stable with minimum effective capacitance of 0.33 f to account for changes with temperature, dc bias and package s ize. especially for small package size capacitors such as 0201 the effective capacitance drops rapidly with the applied dc bias. there is no requirement for the minimum value of equivalent series resistance (esr) for the c out but the maximum value of esr should be less than 3 . larger output capacitors and lower esr could improve the load transient response or high frequency psrr. it is not recommended to use tantalum capacitors on the output due to their large esr. the equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. enable operation the ncv8154 uses the dedicated en pin for each output channel. this feature allows driving outputs separately. if the en pin voltage is <0.4 v the device is guaranteed to be disabled. the pass transistor is turned?off so that there is virtually no current flow between the in and out. the active discharge transistor is active so that the output voltage v out is pulled to gnd through a 50 resistor. in the disable state the device consumes as low as typ. 10 na from the v in . if the en pin voltage >0.9 v the device is guaranteed to be enabled. the ncv8154 regulates the output voltage and the active discharge transistor is turned?off. the both en pin has internal pull?down current source with typ. value of 300 na which assures that the device is turned?off when the en pin is not connected. in the case where the en function isn?t required the en should be tied directly to in. output current limit output current is internally limited within the ic to a typical 400 ma. the ncv8154 will source this amount of current measured with a voltage drops on the 90% of the nominal v out . if the output voltage is directly shorted to ground (v out = 0 v), the short circuit protection will limit the output current to 520 ma (typ). the current limit and short circuit protection will work properly over whole temperature range and also input voltage range. there is no limitation for the short circuit duration. this protection works separately for each channel. short circuit on the one channel do not influence second channel which will work according to specification. thermal shutdown when the die temperature exceeds the thermal shutdown threshold (t sd ? 160 c typical), thermal shutdown event is detected and the affected channel is turn?off. second channel still working. the channel which is overheated will remain in this state until the die temperature decreases below the thermal shutdown reset threshold (t sdu ? 140 c typical). once the device temperature falls below the 140 c the appropriate channel is enabled again. the thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. this protection is not intended to be used as a substitute for proper heat sinking. the long duration of the short circuit condition to some output channel could cause turn?off other output when heat sinking is not enough and temperature of the other output reach t sd temperature. power dissipation as power dissipated in the ncv8154 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. for reliable operation, junction temperature should be limited to +125 c. the maximum power dissipation the ncv8154 can handle is given by: p d(max) t j(max) t a ja (eq. 1) the power dissipated by the ncv8154 for given application conditions can be calculated from the following equations:
ncv8154 www. onsemi.com 15 p d v in1 i gnd1
v in2 i gnd2
(eq. 2)
i out1 v in1 v out1
i out2 v in2 v out2 figure 52. ja and p d(max) vs. copper area ? dfn10 copper heat spreader area (mm 2 ) ja , junction to ambient thermal resistance ( c/w) p d(max) , maximum power dissipation (w) p d(max) , t a = 25 c, 2 oz cu p d(max) , t a = 25 c, 1 oz cu ja , 1 oz cu ja , 2 oz cu 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 50 70 90 110 130 150 170 190 210 230 250 0 100 200 300 400 500 600 700 figure 53. ja and p d(max) vs. copper area ? wdfn6 copper heat spreader area (mm 2 ) ja , junction to ambient thermal resistance ( c/w) p d(max) , maximum power dissipation (w) p d(max) , t a = 25 c, 2 oz cu p d(max) , t a = 25 c, 1 oz cu ja , 1 oz cu ja , 2 oz cu 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 90 115 140 165 190 215 240 265 290 315 340 0 100 200 300 400 500 600 700 reverse current the pmos pass transistor has an inherent body diode which will be forward biased in the case that v out > v in . due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. power supply rejection ratio the ncv8154 features very good power supply rejection ratio. if desired the psrr at higher frequencies in the range 100 khz ? 10 mhz can be tuned by the selection of c out capacitor and proper pcb layout. turn?on time the turn?on time is defined as the time period from en assertion to the point in which v out will reach 98% of its nominal value. this time is dependent on various application conditions such as v out(nom) , c out , t a . pcb layout recommendations to obtain good transient performance and good regulation characteristics place input and output capacitors close to the device pins and make the pcb traces wide. in order to minimize the solution size, use 0402 capacitors. larger copper area connected to the pins will also improve the device thermal resistance. the actual power dissipation can be calculated from the equation above (equation 2). expose pad should be tied the shortest path to the gnd pin.
ncv8154 www. onsemi.com 16 table 6. ordering information device marking voltage option (out1/out2) active discharge features package shipping ? ncv8154mw180280tbg 8154w 1828 1.8 v / 2.8 v yes wettable flank dfn10 (pb-free) 3000 / tape & reel ncv8154mn300300tbg 8154n 3030 3.0 v / 3.0 v yes non?wettable flank ncv8154mw300300tbg 8154w 3030 yes wettable flank ncv8154mn330180tbg 8154n 3318 3.3 v / 1.8 v yes non?wettable flank ncv8154mw330180tbg 8154w 3318 yes wettable flank ncv8154mw330280tbg 8154w 3328 3.3 v / 2.8 v yes ncv8154mw330330tbg 8154w 3333 3.3 v / 3.3 v yes NCV8154MTW180280TCG da 1.8 v / 2.8 v no wettable flank wdfn6 (pb-free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncv8154 www. onsemi.com 17 package dimensions dfn10 3x3, 0.5p case 485c issue c 10x seating plane l d e 0.15 c a a1 e d2 e2 b 15 10 6 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. 5. terminal b may have mold compound material along side edge. mold flashing may not exceed 30 microns onto bottom surface of terminal b. 6. details a and b show optional views for end of terminal lead at edge of package. 7. for device opn containing w option, detail b alternate construction is not applicable. ??? ??? ??? b a 0.15 c top view side view bottom view pin 1 reference 0.10 c 0.08 c (a3) c 10x 10x 0.10 c 0.05 c a b note 3 k 10x dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.18 0.30 d 3.00 bsc d2 2.40 2.60 e 3.00 bsc e2 1.70 1.90 e 0.50 bsc l 0.35 0.45 l1 0.00 0.03 detail a k 0.19 typ 2x 2x l1 detail a bottom view (optional) *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 2.1746 2.6016 1.8508 0.5000 pitch 0.5651 10x 3.3048 0.3008 10x dimensions: millimeters
ncv8154 www. onsemi.com 18 package dimensions wdfn6 1.5x1.5, 0.5p case 511bj issue b notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d e 0.10 c a3 a a1 2x 2x 0.10 c dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d e e l pin one reference 0.05 c 0.05 c a 0.10 c note 3 l2 e b b 3 6 6x 1 4 0.05 c mounting footprint* l1 1.50 bsc 1.50 bsc 0.50 bsc 0.40 0.60 --- 0.15 bottom view l 5x dimensions: millimeters 0.73 6x 0.35 5x 1.80 0.50 pitch *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. l1 detail a l alternate terminal constructions ??? ??? l2 0.50 0.70 top view b side view note 4 recommended 0.83 on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncv8154/d bluetooth is a registered trademark of bluetooth sig. zigbee is a registered trademark of zigbee alliance. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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